A description of the background points out the desirability and advantages of LSSD logic system design disciplines. The hardware backbone, an auxiliary shift register built onto and around the system latches, that supports the LSSD is then brought into focus. Its principle of operations and its implementation in the current practice form are then given in order to compare them with those involved in the A.S.R.
This is followed by a detailed description of the invention. Of no less importance are the several supplementary teachings concerning the use of the A.S.R. in the LSSD environment. A main point here is that for all of its substantial hardware economy, the use of A.S.R. is completely free of added burden from what is already required of the conventional shift register design.
Application of the new device is finally brought to full focus by introduction of the combined shift-out shift-in operation to the A.S.R. auxiliary system. This produces further operational simplicity and efficiency.
The above ABSTRACT is not to be taken either as a complete exposition or as a limitation of the present invention, the full nature and extent of the invention being discernible only by reference to and from the entire disclosure